The inventive concept relates generally to semiconductor devices. Certain embodiments relate to a data loading circuit for a non-volatile memory device and a semiconductor memory device comprising the data loading circuit.
An electronic device may incorporate a non-volatile memory to store data when the device is powered off. In such a device, the data may be moved from the non-volatile memory to a volatile memory during a power-up operation to allow rapid access during operation of the device.
The volatile memory may be a main memory, or it may be some other type of memory. For example, where the data comprises fail addresses for repairing failed memory cells, the volatile memory may be a repair control circuit disposed near a memory cell array.
The repair control circuit typically comprises a shift register in which the fail addresses are loaded. In general, the shift register requires a master latch and a slave latch for storing one data bit and thus the shift register occupies a relatively large area. As the quantity of data to be loaded increases, the required area of the shift register tends to increase accordingly. As a result, the design margin of the electronic device may decrease as well.